A transmitter used in a communication system such as a mobile telephone and a wireless LAN is required to maintain a high-precision transmission waveform and also operate with low power consumption, without depending on intensity of transmission power. Particularly, a power amplifier for transmission provided at a final stage of a transmitter consumes high power, and is therefore required to have high power efficiency.
In recent years, a switching amplifier has been drawing attention as a power amplifier expected to have high power efficiency. A switching amplifier is assumed to have a pulse waveform signal as an input signal, and amplifies power while maintaining a waveform of the pulse waveform signal. After a frequency component other than a desired frequency component is suppressed by a filter element, the pulse waveform signal amplified by the switching amplifier is emitted into air by an antenna.
FIG. 14 is a circuit diagram illustrating an amplifier called a class-D or class-S amplifier (hereinafter, representatively referred to as a class-D amplifier) which is a typical example of a switching amplifier. A class-D amplifier amplifies a signal having two values of logic “1” or logic “−1”.
The class-D amplifier has a configuration in which two switch elements a and b are connected in series between a power source and a ground (GND). Complementary pulse signals S1 and S2 are input, as on-off control signals, to the two switch elements a and b, and only one of the switch elements a and b is controlled to be in an on-state. When the power-source-side switch element a is on and the ground-side switch element b is off, voltage (a high level, logic “1”) equal to power source voltage is output from the class-D amplifier. On the contrary, when the switch element a is off and the switch element b is on, voltage (a low level, logic “−1”) equal to ground potential is output from the class-D amplifier.
The class-D amplifier does not need bias current, and ideally has zero power loss. The switch elements a and b can be configured with a field effect transistor and a bipolar transistor.
FIG. 15 illustrates a configuration of a transmitter disclosed in NPL 1, in which a binary digital signal generator for converting a baseband signal into a binary digital signal is combined with a class-D amplifier. The binary digital signal generator delta-sigma-modulates each of in-phase/quadrature (I/Q) signals which are quadrature signals generated by a digital baseband generator, and further converts the signals into a radio-frequency (RF)-band binary digital signal by a digital up converter.
As an example of a delta-sigma modulator, a circuit block diagram of a primary delta-sigma modulator is illustrated in FIG. 16. After being amplified by the class-D amplifier, the binary digital signal is emitted from an antenna via a bandpass filter.
FIG. 17 illustrates a configuration of another transmitter using a class-D amplifier, disclosed in PTL 1. The transmitter in FIG. 17 converts an I-signal and a Q-signal which are input signals generated by a digital baseband generator into an amplitude signal r and a phase signal θ by an amplitude-phase converter. In a binary digital signal generator, the amplitude signal r is delta-sigma-modulated, and thus converted into a binary digital signal. The phase signal θ is up-converted by an up converter onto an RF band with a carrier frequency from an oscillator, and converted into an RF-band phase signal by a quantizer. Further, the binary digital signal is multiplied by the RF-band phase signal in a multiplier, and a RF-band binary digital signal is thus generated. After being amplified by the class-D amplifier, the binary digital signal is emitted from an antenna via a bandpass filter.
A method of improving a signal-to-noise ratio and power efficiency of the binary digital signal after the class-D amplifier in FIGS. 15 and 17 is disclosed in NPL 2. FIG. 18 illustrates a configuration of still another transmitter using a class-D amplifier, disclosed in NPL 2. The transmitter in FIG. 18 includes two sets of binary digital signal generators and class-D amplifiers. Amplitude signals r1 and r2 generated by a digital signal processor (DSP) in response to an amplitude signal r, and a phase signal θ are generated as RF-band binary digital signals by the binary digital signal generators, respectively. Because outputs of the two class-D amplifiers take two values of “1” and “4”, respectively, a sum of outputs of the two class-D amplifiers is a ternary digital signal of “2”, “0”, and “−2”. The ternary digital signal is emitted from an antenna via a bandpass filter.
The ternary digital signal after the class-D amplifier in FIG. 18 has reduced quantization noise of the signal and a higher signal-to-noise ratio, as compared with the binary digital signal after the class-D amplifier in FIGS. 15 and 17. This is because a digital signal includes a desired signal and quantization noise, and a quantization noise component is reduced by multivalue conversion. Moreover, power efficiency also becomes higher because of reduction of the noise component.
Note that, in FIGS. 15, 17, and 18, illustration, a driver amplifier is omitted. The amplifier receives a binary digital signal generated by the binary digital signal generator and then inputs the binary digital signal and a complementary signal thereof to the class-D amplifier.